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ASYNC
2005
IEEE
118views Hardware» more  ASYNC 2005»
14 years 1 months ago
Modeling and Verifying Circuits Using Generalized Relative Timing
We propose a novel technique for modeling and verifying timed circuits based on the notion of generalized relative timing. Generalized relative timing constraints can express not ...
Sanjit A. Seshia, Randal E. Bryant, Kenneth S. Ste...
CODES
2005
IEEE
14 years 1 months ago
Iterational retiming: maximize iteration-level parallelism for nested loops
Nested loops are the most critical sections in many scientific and Digital Signal Processing (DSP) applications. It is important to study effective and efficient transformation ...
Chun Xue, Zili Shao, Meilin Liu, Edwin Hsing-Mean ...
IPPS
2005
IEEE
14 years 1 months ago
Exploring the Energy-Time Tradeoff in MPI Programs on a Power-Scalable Cluster
Recently, energy has become an important issue in highperformance computing. For example, supercomputers that have energy in mind, such as BlueGene/L, have been built; the idea is...
Vincent W. Freeh, Feng Pan, Nandini Kappiah, David...
IPPS
2005
IEEE
14 years 1 months ago
High-Performance Direct Pairwise Comparison of Large Genomic Sequences
Many applications in Comparative Genomics lend themselves to implementations that take advantage of common high-performance features in modern microprocessors. However, the common...
Christopher Mueller, Mehmet M. Dalkilic, Andrew Lu...
SC
2005
ACM
14 years 1 months ago
Fault Tolerance Techniques for the Merrimac Streaming Supercomputer
As device scales shrink, higher transistor counts are available while soft-errors, even in logic, become a major concern. A new class of architectures, such as Merrimac and the IB...
Mattan Erez, Nuwan Jayasena, Timothy J. Knight, Wi...