Sciweavers

214 search results - page 12 / 43
» A system level design methodology for the optimization of he...
Sort
View
CODES
2009
IEEE
13 years 11 months ago
Building heterogeneous reconfigurable systems with a hardware microkernel
Field Programmable Gate Arrays (FPGAs) have long held the promise of allowing designers to create systems with performance levels close to custom circuits but with a softwarelike ...
Jason Agron, David L. Andrews
DATE
2006
IEEE
91views Hardware» more  DATE 2006»
14 years 1 months ago
Virtual prototyping of embedded platforms for wireless and multimedia
Most of the challenges related to the development of multi-processor platforms for complex wireless and multimedia applications fall into the Electronic System Level (ESL) domain....
Tim Kogel, Matthew Braun
EURODAC
1995
IEEE
138views VHDL» more  EURODAC 1995»
13 years 11 months ago
Reduced design time by load distribution with CAD framework methodology information
This paper is focused on reducing the design time in a CAD framework environment by the optimal use of resources. A user-transparent load distribution system (Framework based LOad...
Jürgen Schubert, Arno Kunzmann, Wolfgang Rose...
DATE
2006
IEEE
110views Hardware» more  DATE 2006»
14 years 1 months ago
Configurable multiprocessor platform with RTOS for distributed execution of UML 2.0 designed applications
This paper presents the design and full prototype implementation of a configurable multiprocessor platform that supports distributed execution of applications described in UML 2.0...
Tero Arpinen, Petri Kukkala, Erno Salminen, Marko ...
ASAP
1997
IEEE
156views Hardware» more  ASAP 1997»
13 years 12 months ago
Design methodology for digital signal processing
Improvements in semiconductor integration density and the resulting problem of having to manage designs of increasing complexity is an old one, but still current. The new challeng...
Gerhard Fettweis