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ISCA
1997
IEEE
98views Hardware» more  ISCA 1997»
14 years 2 months ago
Prefetching Using Markov Predictors
Prefetching is one approach to reducing the latency of memory operations in modern computer systems. In this paper, we describe the Markov prefetcher. This prefetcher acts as an i...
Doug Joseph, Dirk Grunwald
DFT
2008
IEEE
151views VLSI» more  DFT 2008»
13 years 11 months ago
Design and Evaluation of a Timestamp-Based Concurrent Error Detection Method (CED) in a Modern Microprocessor Controller
This paper presents a concurrent error detection technique for the control logic of a modern microprocessor. Our method is based on execution time prediction for each instruction ...
Michail Maniatakos, Naghmeh Karimi, Yiorgos Makris...
ERLANG
2003
ACM
14 years 3 months ago
Evaluating distributed functional languages for telecommunications software
The distributed telecommunications sector not only requires minimal time to market, but also software that is reliable, available, maintainable and scalable. High level programmin...
Jan Henry Nyström, Philip W. Trinder, David J...
DAC
2012
ACM
12 years 8 days ago
WCET-centric partial instruction cache locking
Caches play an important role in embedded systems by bridging the performance gap between high speed processors and slow memory. At the same time, caches introduce imprecision in ...
Huping Ding, Yun Liang, Tulika Mitra
CISS
2011
IEEE
13 years 1 months ago
Hardware accelerated visual attention algorithm
— We present a hardware-accelerated implementation of a bottom-up visual attention algorithm. This algorithm generates a multi-scale saliency map from differences in image intens...
Polina Akselrod, Faye Zhao, Ifigeneia Derekli, Cl&...