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TIME
2009
IEEE
16 years 21 days ago
Axiomatizations for Temporal Epistemic Logic with Perfect Recall over Linear Time
—This paper presents various semantic interpretations for logics of knowledge and time with prefect recall. We allow both past and future operators and examine the interpretation...
Szabolcs Mikulás, Mark Reynolds, Tim French
CAV
2005
Springer
144views Hardware» more  CAV 2005»
15 years 11 months ago
Romeo: A Tool for Analyzing Time Petri Nets
In this paper, we present the features of Romeo, a Time Petri Net (TPN) analyzer. The tool Romeo allows state space computation of TPN and on-the-fly model-checking of reachabilit...
Guillaume Gardey, Didier Lime, Morgan Magnin, Oliv...
FORMATS
2007
Springer
16 years 3 days ago
Counter-Free Input-Determined Timed Automata
We identify a class of timed automata, which we call counter-free input-determined automata, which characterize the class of timed languages definable by several timed temporal l...
Fabrice Chevalier, Deepak D'Souza, Pavithra Prabha...
IFM
2007
Springer
104views Formal Methods» more  IFM 2007»
16 years 3 days ago
Probabilistic Timed Behavior Trees
The Behavior Tree notation has been developed as a method for systematically and traceably capturing user requirements. In this paper we extend the notation with probabilistic beha...
Robert Colvin, Lars Grunske, Kirsten Winter
FMCAD
2000
Springer
15 years 9 months ago
Model Checking Synchronous Timing Diagrams
Abstract. Model checking is an automated approach to the formal verification of hardware and software. To allow model checking tools to be used by the hardware or software designer...
Nina Amla, E. Allen Emerson, Robert P. Kurshan, Ke...