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IEEEPACT
1998
IEEE
14 years 1 days ago
Athapascan-1: On-Line Building Data Flow Graph in a Parallel Language
In order to achieve practical efficient execution on a parallel architecture, a knowledge of the data dependencies related to the application appears as the key point for building...
François Galilée, Jean-Louis Roch, G...
DATE
2010
IEEE
161views Hardware» more  DATE 2010»
14 years 26 days ago
FPGA-based adaptive computing for correlated multi-stream processing
Abstract—In conventional static implementations for correlated streaming applications, computing resources may be inefficiently utilized since multiple stream processors may sup...
Ming Liu, Zhonghai Lu, Wolfgang Kuehn, Axel Jantsc...
PLDI
2012
ACM
11 years 10 months ago
Dynamic synthesis for relaxed memory models
Modern architectures implement relaxed memory models which may reorder memory operations or execute them non-atomically. Special instructions called memory fences are provided, al...
Feng Liu, Nayden Nedev, Nedyalko Prisadnikov, Mart...
RTAS
2006
IEEE
14 years 1 months ago
Network-Code Machine: Programmable Real-Time Communication Schedules
Distributed hard real-time systems require guaranteed communication. One common approach is to restrict network access by enforcing a time-division multiple access (TDMA) schedule...
Sebastian Fischmeister, Oleg Sokolsky, Insup Lee
CODES
2008
IEEE
13 years 9 months ago
Performance debugging of Esterel specifications
Synchronous languages like Esterel have been widely adopted for designing reactive systems in safety-critical domains such as avionics. Specifications written in Esterel are based...
Lei Ju, Bach Khoa Huynh, Abhik Roychoudhury, Samar...