277 search results - page 12 / 56 » A transformation based algorithm for reversible logic synthe... |
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
Timing closure problems occur when timing estimates computed during logic synthesis do not match with timing estimates computed from the layout of the circuit. In such a situation...
ISMVL
2010
IEEE
14 years 19 days ago
2010
IEEE
In this paper a new Toffoli gate cascade synthesis method is presented. This method is based on previous work [12] and generates a cascade of inverted-control-Toffoli gates from t...
IPMI
2001
Springer
14 years 8 months ago
2001
Springer
Landmark-based thin-plate spline image registration is one of the most commonly used methods for non-rigid medical image registration and anatomical shape analysis. It is well know...
ACSD
2004
IEEE
13 years 11 months ago
2004
IEEE
The behaviour of asynchronous circuits is often described by Signal Transition Graphs (STGs), which are Petri nets whose transitions are interpreted as rising and falling edges of...
DAC
1997
ACM
13 years 11 months ago
1997
ACM
In this paper, we introduce a Shared Multiple Rooted XORbased Decomposition Diagram XORDD to represent functions with multiple outputs. Based on the XORDD representation, we dev...