Sciweavers

17 search results - page 3 / 4
» AIRA: Additive Increase Rate Accelerator
Sort
View
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 2 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
INTERACT
2003
13 years 10 months ago
High-Density Cursor: a Visualization Technique that Helps Users Keep Track of Fast-moving Mouse Cursors
: As bigger screens and multi-monitor configurations become more popular, users employ higher mouse accelerations in order to traverse the screen reasonably quickly. The faster the...
Patrick Baudisch, Edward Cutrell, George G. Robert...
VTC
2006
IEEE
203views Communications» more  VTC 2006»
14 years 2 months ago
The 3G Long-Term Evolution - Radio Interface Concepts and Performance Evaluation
Abstract—3GPP is in the process of defining the long-term evolution (LTE) for 3G radio access, sometimes referred to as Super3G, in order to maintain the future competitiveness o...
Erik Dahlman, Hannes Ekström, Anders Furuskar...
TVLSI
2008
121views more  TVLSI 2008»
13 years 8 months ago
Area-Efficient Arithmetic Expression Evaluation Using Deeply Pipelined Floating-Point Cores
Recently, it has become possible to implement floating-point cores on field-programmable gate arrays (FPGAs) to provide acceleration for the myriad applications that require high-p...
Ronald Scrofano, Ling Zhuo, Viktor K. Prasanna
SIAMSC
2010
143views more  SIAMSC 2010»
13 years 7 months ago
Computing and Deflating Eigenvalues While Solving Multiple Right-Hand Side Linear Systems with an Application to Quantum Chromod
Abstract. We present a new algorithm that computes eigenvalues and eigenvectors of a Hermitian positive definite matrix while solving a linear system of equations with Conjugate G...
Andreas Stathopoulos, Konstantinos Orginos