With increasing levels of integration of multiple processing cores and new features to support software functionality, recent generations of microprocessors face difficult validati...
Deepak Mathaikutty, Sreekumar V. Kodakara, Ajit Di...
We present a technique for automatic verification of pipelined microprocessors using model checking. Antecedent conditioned slicing is an efficient abstraction technique for hardw...
Shobha Vasudevan, Vinod Viswanath, Jacob A. Abraha...
Abstract— In bounded model checking (BMC)-based verification flows lack of reachability constraints often leads to false negatives. At present, it is daily practice of a veri...
Minh D. Nguyen, Dominik Stoffel, Markus Wedler, Wo...
Abstract. This paper describes a framework for quantitative analysis of neuroimaging data of traveling human phantoms used for cross-site validation. We focus on the analysis of ma...
Sylvain Gouttard, Martin Styner, Marcel Prastawa...
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...