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» Abduction in Temporal Reasoning
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GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
14 years 2 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
RTAS
2009
IEEE
14 years 2 months ago
On Time-Aware Instrumentation of Programs
—Software instrumentation is a key technique in many stages of the development process. It is of particular importance for debugging embedded systems. Instrumented programs produ...
Sebastian Fischmeister, Patrick Lam
LICS
2009
IEEE
14 years 2 months ago
On the Computational Complexity of Verifying One-Counter Processes
—One-counter processes are pushdown systems over a singleton stack alphabet (plus a stack-bottom symbol). We study the complexity of two closely related verification problems ov...
Stefan Göller, Richard Mayr, Anthony Widjaja ...
ATAL
2009
Springer
14 years 2 months ago
Combining fault injection and model checking to verify fault tolerance in multi-agent systems
The ability to guarantee that a system will continue to operate correctly under degraded conditions is key to the success of adopting multi-agent systems (MAS) as a paradigm for d...
Jonathan Ezekiel, Alessio Lomuscio
BIBM
2008
IEEE
108views Bioinformatics» more  BIBM 2008»
14 years 2 months ago
Systematic Evaluation of Scaling Methods for Gene Expression Data
Even after an experimentally prepared gene expression data set has been pre-processed to account for variations in the microarray technology, there may be inconsistencies between ...
Gaurav Pandey, Lakshmi Naarayanan Ramakrishnan, Mi...