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DATE
2009
IEEE
127views Hardware» more  DATE 2009»
14 years 4 months ago
Process variation aware thread mapping for Chip Multiprocessors
Abstract—With the increasing scaling of manufacturing technology, process variation is a phenomenon that has become more prevalent. As a result, in the context of Chip Multiproce...
Shengyan Hong, Sri Hari Krishna Narayanan, Mahmut ...
WOMPAT
2001
Springer
14 years 2 months ago
CableS : Thread Control and Memory System Extensions for Shared Virtual Memory Clusters
Clusters of high-end workstations and PCs are currently used in many application domains to perform large-scale computations or as scalable servers for I/O bound tasks. Although cl...
Peter Jamieson, Angelos Bilas
HPCC
2009
Springer
14 years 1 months ago
Dynamically Filtering Thread-Local Variables in Lazy-Lazy Hardware Transactional Memory
Abstract--Transactional Memory (TM) is an emerging technology which promises to make parallel programming easier. However, to be efficient, underlying TM system should protect only...
Sutirtha Sanyal, Sourav Roy, Adrián Cristal...
MICRO
2010
IEEE
270views Hardware» more  MICRO 2010»
13 years 7 months ago
Many-Thread Aware Prefetching Mechanisms for GPGPU Applications
Abstract-- We consider the problem of how to improve memory latency tolerance in massively multithreaded GPGPUs when the thread-level parallelism of an application is not sufficien...
Jaekyu Lee, Nagesh B. Lakshminarayana, Hyesoon Kim...
ISPASS
2010
IEEE
13 years 7 months ago
Weak execution ordering - exploiting iterative methods on many-core GPUs
Abstract--On NVIDIA's many-core GPUs, there is no synchronization function among parallel thread blocks. When finegranularity of data communication and synchronization is requ...
Jianmin Chen, Zhuo Huang, Feiqi Su, Jih-Kwon Peir,...