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RSP
2005
IEEE
131views Control Systems» more  RSP 2005»
14 years 1 months ago
Models for Embedded Application Mapping onto NoCs: Timing Analysis
Networks-on-chip (NoCs) are an emergent communication infrastructure, which can be designed to deal with growing system complexity and technology evolution. The efficient use of N...
César A. M. Marcon, Márcio Eduardo K...
WORDS
2005
IEEE
14 years 1 months ago
Virtual Networks in an Integrated Time-Triggered Architecture
Depending on the physical structuring of large distributed safety-critical real-time systems, one can distinguish federated and integrated system architectures. This paper investi...
Roman Obermaisser, Philipp Peti, Hermann Kopetz
AOSD
2005
ACM
14 years 1 months ago
abc: an extensible AspectJ compiler
Abstract. Research in the design of aspect-oriented programming languages requires a workbench that facilitates easy experimentation with new language features and implementation t...
Pavel Avgustinov, Aske Simon Christensen, Laurie J...
ASPDAC
2005
ACM
113views Hardware» more  ASPDAC 2005»
14 years 1 months ago
Scalable interprocedural register allocation for high level synthesis
Abstract— The success of classical high level synthesis has been limited by the complexity of the applications it can handle, typically not large enough to necessitate the depart...
Rami Beidas, Jianwen Zhu
SC
2005
ACM
14 years 1 months ago
VSched: Mixing Batch And Interactive Virtual Machines Using Periodic Real-time Scheduling
We are developing Virtuoso, a system for distributed computing using virtual machines (VMs). Virtuoso must be able to mix batch and interactive VMs on the same physical hardware, ...
Bin Lin, Peter A. Dinda