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HIPEAC
2005
Springer
14 years 28 days ago
Power Aware External Bus Arbitration for System-on-a-Chip Embedded Systems
Abstract. Power efficiency has become a key design trade-off in embedded system designs. For system-on-a-chip embedded systems, an external bus interconnects embedded processor co...
Ke Ning, David R. Kaeli
CODES
2007
IEEE
13 years 11 months ago
Synchronization after design refinements with sensitive delay elements
The synchronous computational model with its simple computation and communication mechanism makes it easy to describe, simulate and formally verify synchronous embedded systems at...
Tarvo Raudvere, Ingo Sander, Axel Jantsch
CORR
2002
Springer
131views Education» more  CORR 2002»
13 years 7 months ago
Ownership Confinement Ensures Representation Independence for Object-Oriented Programs
for data abstraction and justifies reasoning by simulation. Representation independence has been shown for a variety of languages and constructs but not for shared references to mu...
Anindya Banerjee, David A. Naumann
CN
2011
111views more  CN 2011»
12 years 11 months ago
On the design of network control and management plane
We provide a design of a control and management plane for data networks using the abstraction of 4D architecture, utilizing and extending 4D’s concept of a logically centralized...
Hammad Iqbal, Taieb Znati
CODES
2008
IEEE
14 years 1 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava