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EURODAC
1994
IEEE
129views VHDL» more  EURODAC 1994»
15 years 8 months ago
A general state graph transformation framework for asynchronous synthesis
Abstract -- A general framework for synthesis of asynchronous control circuits at the state graph level is proposed. The framework can consider both concurrency reduction as well a...
Bill Lin, Chantal Ykman-Couvreur, Peter Vanbekberg...
CONCUR
2006
Springer
15 years 7 months ago
Proving Liveness by Backwards Reachability
Abstract. We present a new method for proving liveness and termination properties for fair concurrent programs, which does not rely on finding a ranking function or on computing th...
Parosh Aziz Abdulla, Bengt Jonsson, Ahmed Rezine, ...
EUROPAR
2006
Springer
15 years 7 months ago
Toward a Definition of and Linguistic Support for Partial Quiescence
Abstract. The global quiescence of a distributed computation (or distributed termination detection) is an important problem. Some concurrent programming languages and systems provi...
Billy Yan-Kit Man, Hiu Ning (Angela) Chan, Andrew ...
COOP
2004
15 years 5 months ago
Model Checking Groupware Protocols
Abstract. The enormous improvements in the efficiency of model-checking techniques in recent years facilitates their application to ever more complex systems of concurrent and dist...
Maurice H. ter Beek, Mieke Massink, Diego Latella,...
OPODIS
2004
15 years 5 months ago
Lock-Free and Practical Doubly Linked List-Based Deques Using Single-Word Compare-and-Swap
Abstract. We present an efficient and practical lock-free implementation of a concurrent deque that supports parallelism for disjoint accesses and uses atomic primitives which are ...
Håkan Sundell, Philippas Tsigas