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ICUMT
2009
13 years 5 months ago
Effective buffer and storage management in DTN nodes
Current wired networks have been developed on the basis of the AIMD principle, which offers increased performance and fairness. Nevertheless, there is a vast spectrum of networks, ...
Stylianos Dimitriou, Vassilis Tsaoussidis
CHES
2009
Springer
162views Cryptology» more  CHES 2009»
14 years 8 months ago
Hardware Accelerator for the Tate Pairing in Characteristic Three Based on Karatsuba-Ofman Multipliers
Abstract. This paper is devoted to the design of fast parallel accelerators for the cryptographic Tate pairing in characteristic three over supersingular elliptic curves. We propos...
Jean-Luc Beuchat, Jérémie Detrey, Ni...
MICRO
2010
IEEE
215views Hardware» more  MICRO 2010»
13 years 5 months ago
A Task-Centric Memory Model for Scalable Accelerator Architectures
This paper presents a task-centric memory model for 1000-core compute accelerators. Visual computing applications are emerging as an important class of workloads that can exploit ...
John H. Kelm, Daniel R. Johnson, Steven S. Lumetta...
ISBI
2009
IEEE
14 years 2 months ago
Performance Evaluation of Accelerated Functional MRI Acquisition Using Compressed Sensing
Functional MRI (fMRI) has been widely accepted as a standard tool to study the function of brain. However, because of the limited temporal resolution of MR scanning, researchers h...
Hong Jung, Jong Chul Ye
MOBIDE
1999
ACM
13 years 11 months ago
Accelerating Telnet Performance in Wireless Networks
This paper describes the design of a system that significantly improves the performance of telnet data delivery for 3270 and 5250 emulation so that access to legacy applications v...
Barron C. Housel, Ian Shields