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» Accelerated costas array enumeration using FPGAs
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FPL
2007
Springer
115views Hardware» more  FPL 2007»
14 years 2 months ago
Hardware/Software Process Migration and RTL Simulation
This paper describes an execution cache that uses process migration between hardware and software contexts by way of run-time reconfiguration (RTR) of Field Programmable Gate Arr...
Aric D. Blumer, Cameron D. Patterson
ICDE
2011
IEEE
235views Database» more  ICDE 2011»
12 years 11 months ago
Fast data analytics with FPGAs
—The rapidly increasing amount of data available for real-time analysis (i.e., so-called operational business intelligence) is creating an interesting opportunity for creative ap...
Louis Woods, Gustavo Alonso

Lecture Notes
1005views
15 years 8 months ago
Lectures on reconfigurable computing
Driven by recent innovations in Field-Programmable Gate Arrays (FPGAs), reconfigurable computing offers unique ways to accelerate key algorithms. FPGAs offer a programmable logic f...
Sherief Reda
IPPS
2007
IEEE
14 years 2 months ago
High Performance Database Searching with HMMer on FPGAs
1 Profile Hidden Markov Models (profile HMMs) are used as a popular bioinformatics tool for sensitive database searching, e.g. a set of not annotated protein sequences is compared...
Timothy F. Oliver, Leow Yuan Yeow, Bertil Schmidt
ICPP
2009
IEEE
14 years 2 months ago
Accelerating Lattice Boltzmann Fluid Flow Simulations Using Graphics Processors
—Lattice Boltzmann Methods (LBM) are used for the computational simulation of Newtonian fluid dynamics. LBM-based simulations are readily parallelizable; they have been implemen...
Peter Bailey, Joe Myre, Stuart D. C. Walsh, David ...