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HPCA
2000
IEEE
13 years 11 months ago
Decoupled Value Prediction on Trace Processors
Value prediction is a technique that breaks true data dependences by predicting the outcome of an instruction, and executes speculatively its data-dependent instructions based on ...
Sang Jeong Lee, Yuan Wang, Pen-Chung Yew
ISPASS
2010
IEEE
14 years 2 months ago
Visualizing complex dynamics in many-core accelerator architectures
—While many-core accelerator architectures, such as today’s Graphics Processing Units (GPUs), offer orders of magnitude more raw computing power than contemporary CPUs, their m...
Aaron Ariel, Wilson W. L. Fung, Andrew E. Turner, ...
IPPS
2006
IEEE
14 years 1 months ago
Detecting phases in parallel applications on shared memory architectures
Most programs are repetitive, where similar behavior can be seen at different execution times. Algorithms have been proposed that automatically group similar portions of a program...
Erez Perelman, Marzia Polito, Jean-Yves Bouguet, J...
IISWC
2008
IEEE
14 years 1 months ago
Accelerating multi-core processor design space evaluation using automatic multi-threaded workload synthesis
The design and evaluation of microprocessor architectures is a difficult and time-consuming task. Although small, handcoded microbenchmarks can be used to accelerate performance e...
Clay Hughes, Tao Li
SAC
2011
ACM
12 years 10 months ago
Parallel multivariate slice sampling
Slice sampling provides an easily implemented method for constructing a Markov chain Monte Carlo (MCMC) algorithm. However, slice sampling has two major drawbacks: (i) it requires...
Matthew M. Tibbits, Murali Haran, John C. Liechty