36 search results - page 4 / 8 » Accelerating Architectural Simulation by Parallel Execution ... |
IEEEPACT
2003
IEEE
14 years 18 days ago
2003
IEEE
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...
DSD
2011
IEEE
12 years 7 months ago
2011
IEEE
Abstract—We present a new low-level interfacing scheme for connecting custom accelerators to processors that tolerates latencies that usually occur when accessing hardware accele...
IPPS
2010
IEEE
13 years 5 months ago
2010
IEEE
Abstract--The increasing availability of multi-core and multiprocessor architectures provides new opportunities for improving the performance of many computer simulations. Markov C...
IPPS
2003
IEEE
14 years 18 days ago
2003
IEEE
The available Instruction Level Parallelism in Java bytecode (Java-ILP) is not readily exploitable using traditional in-order or out-of-order issue mechanisms due to dependencies ...
MICRO
2006
IEEE
13 years 7 months ago
2006
IEEE
In the past few years, several research works have demonstrated that sampling can drastically speed up architecture simulation, and several of these sampling techniques are already...