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DAC
2009
ACM
14 years 2 days ago
GPU-based parallelization for fast circuit optimization
The progress of GPU (Graphics Processing Unit) technology opens a new avenue for boosting computing power. This work is an attempt to exploit GPU for accelerating VLSI circuit opt...
Yifang Liu, Jiang Hu
CISIS
2010
IEEE
14 years 22 days ago
A Parallel Programming Framework for Multi-core DNA Sequence Alignment
—A new parallel programming framework for DNA sequence alignment in homogeneous multi-core processor architectures is proposed. Contrasting with traditional coarse-grained parall...
Tiago Jose Barreiros Martins de Almeida, Nuno Fili...
CVPR
2007
IEEE
14 years 9 months ago
OpenVL: Towards A Novel Software Architecture for Computer Vision
This paper presents our progress on OpenVL - a novel software architecture to address efficiency through facilitating hardware acceleration, reusability and scalability for comput...
Changsong Shen, S. Sidney Fels, James J. Little
FCCM
2011
IEEE
220views VLSI» more  FCCM 2011»
12 years 11 months ago
Reducing the Energy Cost of Irregular Code Bases in Soft Processor Systems
— This paper describes an architecture and FPGA synthesis toolchain for building specialized, energy-saving coprocessors called Irregular Code Energy Reducers (ICERs) for a wide ...
Manish Arora, Jack Sampson, Nathan Goulding-Hotta,...
CASES
2003
ACM
14 years 20 days ago
A low-power accelerator for the SPHINX 3 speech recognition system
Accurate real-time speech recognition is not currently possible in the mobile embedded space where the need for natural voice interfaces is clearly important. The continuous natur...
Binu K. Mathew, Al Davis, Zhen Fang