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ARVLSI
1997
IEEE
151views VLSI» more  ARVLSI 1997»
14 years 17 days ago
The Hierarchical Multi-Bank DRAM: A High-Performance Architecture for Memory Integrated with Processors
A microprocessor integrated with DRAM on the same die has the potential to improve system performance by reducing the memory latency and improving the memory bandwidth. However, a...
Tadaaki Yamauchi, Lance Hammond, Kunle Olukotun
CONEXT
2008
ACM
13 years 10 months ago
Towards high performance virtual routers on commodity hardware
Modern commodity hardware architectures, with their multiple multi-core CPUs and high-speed system interconnects, exhibit tremendous power. In this paper, we study performance lim...
Norbert Egi, Adam Greenhalgh, Mark Handley, Micka&...
ECIS
2003
13 years 10 months ago
The impact of information technology on the performance of diversified firms
Diversification may increase economic benefits through more efficient utilization of business resources across multiple markets. However, the benefits of these scope economies are...
Namchul Shin
ICASSP
2010
IEEE
13 years 9 months ago
On the tracking performance of combinations of least mean squares and recursive least squares adaptive filters
Combinations of adaptive filters have attracted attention as a simple solution to improve filter performance, including tracking properties. In this paper, we consider combinati...
Vitor H. Nascimento, Magno T. M. Silva, Luis Anton...
TVLSI
2008
99views more  TVLSI 2008»
13 years 8 months ago
A Design-Specific and Thermally-Aware Methodology for Trading-Off Power and Performance in Leakage-Dominant CMOS Technologies
As CMOS technology scales deeper into the nanometer regime, factors such as leakage power and chip temperature emerge as critically important concerns for high-performance VLSI des...
Sheng-Chih Lin, Kaustav Banerjee