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PPOPP
2010
ACM
14 years 6 months ago
Data transformations enabling loop vectorization on multithreaded data parallel architectures
Loop vectorization, a key feature exploited to obtain high performance on Single Instruction Multiple Data (SIMD) vector architectures, is significantly hindered by irregular memo...
Byunghyun Jang, Perhaad Mistry, Dana Schaa, Rodrig...
EUROPAR
2004
Springer
14 years 18 days ago
Imprecise Exceptions in Distributed Parallel Components
Abstract. Modern microprocessors have sacrificed the exactness of exceptions for improved performance long ago. This is a side effect of reordering instructions so that the micropr...
Kostadin Damevski, Steven G. Parker
DATE
2009
IEEE
85views Hardware» more  DATE 2009»
14 years 3 months ago
SCORES: A scalable and parametric streams-based communication architecture for modular reconfigurable systems
- Parallel architectures have become an increasingly popular method in which to achieve high performance with low power consumption. In order to leverage these benefits, applicatio...
Abelardo Jara-Berrocal, Ann Gordon-Ross
APCSAC
2003
IEEE
14 years 2 months ago
Mapping Applications to a Coarse Grain Reconfigurable System
This paper introduces a method which can be used to map applications written in a high level source language program, like C, to a coarse grain reconfigurable architecture, MONTIU...
Yuanqing Guo, Gerard J. M. Smit, Hajo Broersma, Mi...
IPTPS
2003
Springer
14 years 2 months ago
Controlling the Cost of Reliability in Peer-to-Peer Overlays
Abstract—Structured peer-to-peer overlay networks provide a useful substrate for building distributed applications but there are general concerns over the cost of maintaining the...
Ratul Mahajan, Miguel Castro, Antony I. T. Rowstro...