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» Achieving Scalability in Parallel Tabled Logic Programs
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ICCD
2002
IEEE
138views Hardware» more  ICCD 2002»
14 years 5 months ago
The Imagine Stream Processor
The Imagine Stream Processor is a single-chip programmable media processor with 48 parallel ALUs. At 400 MHz, this translates to a peak arithmetic rate of 16 GFLOPS on single-prec...
Ujval J. Kapasi, William J. Dally, Scott Rixner, J...
CORR
2011
Springer
177views Education» more  CORR 2011»
13 years 3 months ago
Tuffy: Scaling up Statistical Inference in Markov Logic Networks using an RDBMS
Markov Logic Networks (MLNs) have emerged as a powerful framework that combines statistical and logical reasoning; they have been applied to many data intensive problems including...
Feng Niu, Christopher Ré, AnHai Doan, Jude ...
PPOPP
2011
ACM
12 years 11 months ago
GRace: a low-overhead mechanism for detecting data races in GPU programs
In recent years, GPUs have emerged as an extremely cost-effective means for achieving high performance. Many application developers, including those with no prior parallel program...
Mai Zheng, Vignesh T. Ravi, Feng Qin, Gagan Agrawa...
FPGA
1997
ACM
127views FPGA» more  FPGA 1997»
14 years 26 days ago
General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
Amit Chowdhary, John P. Hayes
ICPPW
2003
IEEE
14 years 2 months ago
Load Balancing on PC Clusters with the Super-Programming Model
Recent work in high-performance computing has shifted attention to PC clusters.. For PC-clusters, member nodes are independent computers connected by generalpurpose networks. The ...
Dejiang Jin, Sotirios G. Ziavras