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» Adapting cache line size to application behavior
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HIPEAC
2007
Springer
14 years 1 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
GECCO
2009
Springer
192views Optimization» more  GECCO 2009»
13 years 5 months ago
Improving SMT performance: an application of genetic algorithms to configure resizable caches
Simultaneous Multithreading (SMT) is a technology aimed at improving the throughput of the processor core by applying Instruction Level Parallelism (ILP) and Thread Level Parallel...
Josefa Díaz, José Ignacio Hidalgo, F...
HPCA
2003
IEEE
14 years 7 months ago
Memory System Behavior of Java-Based Middleware
Java-based middleware, and application servers in particular, are rapidly gaining importance as a new class of workload for commercial multiprocessor servers. SPEC has recognized ...
Martin Karlsson, Kevin E. Moore, Erik Hagersten, D...
DOCENG
2006
ACM
14 years 1 months ago
Minimum sized text containment shapes
In many text-processing applications, we would like shapes that expand (or shrink) in size to fit their textual content. We address how to efficiently compute the minimum size fo...
Nathan Hurst, Kim Marriott, Peter Moulder
HCI
2009
13 years 5 months ago
Behavior-Sensitive User Interfaces for Smart Environments
In smart environments interactive assistants can support the user's daily life by being ubiquitously available through any interaction device that is connected to the network....
Veit Schwartze, Sebastian Feuerstack, Sahin Albayr...