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» Adaptive Compressed Caching: Design and Implementation
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134
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HIPEAC
2007
Springer
15 years 9 months ago
Dynamic Capacity-Speed Tradeoffs in SMT Processor Caches
Caches are designed to provide the best tradeoff between access speed and capacity for a set of target applications. Unfortunately, different applications, and even different phas...
Sonia López, Steve Dropsho, David H. Albone...
123
Voted
ASYNC
1998
IEEE
122views Hardware» more  ASYNC 1998»
15 years 7 months ago
A Fast Asynchronous Huffman Decoder for Compressed-Code Embedded Processors
This paper presents the architecture and design of a high-performance asynchronous Huffman decoder for compressed-code embedded processors. In such processors, embedded programs a...
Martin Benes, Steven M. Nowick, Andrew Wolfe
120
Voted
MICRO
2000
IEEE
95views Hardware» more  MICRO 2000»
15 years 7 months ago
Very low power pipelines using significance compression
Data, addresses, and instructions are compressed by maintaining only significant bytes with two or three extension bits appended to indicate the significant byte positions. This s...
Ramon Canal, Antonio González, James E. Smi...
136
Voted
DASIP
2010
14 years 10 months ago
RVC-CAL dataflow implementations of MPEG AVC/H.264 CABAC decoding
This paper describes the implementation of the MPEG AVC CABAC entropy decoder using the RVC-CAL dataflow programming language. CABAC is the Context based Adaptive Binary Arithmeti...
Endri Bezati, Marco Mattavelli, Mickaël Raule...
152
Voted
MOBIDE
1999
ACM
15 years 7 months ago
Accelerating Telnet Performance in Wireless Networks
This paper describes the design of a system that significantly improves the performance of telnet data delivery for 3270 and 5250 emulation so that access to legacy applications v...
Barron C. Housel, Ian Shields