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MASCOTS
2004
13 years 11 months ago
Dual-Processor Parallelisation of Symbolic Probabilistic Model Checking
In this paper, we describe the dual-processor parallelisation of a symbolic (BDD-based) implementation of probabilistic model checking. We use multi-terminal BDDs, which allow a c...
Marta Z. Kwiatkowska, David Parker, Yi Zhang, Rash...
FMICS
2008
Springer
13 years 11 months ago
Efficient Symbolic Model Checking for Process Algebras
Different approaches have been developed to mitigate the state space explosion of model checking techniques. Among them, symbolic verification techniques use efficient representati...
José Vander Meulen, Charles Pecheur
SPIN
2001
Springer
14 years 2 months ago
From Model Checking to a Temporal Proof
ions Using SPIN . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Marsha Chechik, Benet Devereux, Arie Gurfinkel (University of Toronto) Imp...
Doron Peled, Lenore D. Zuck
GLVLSI
2009
IEEE
150views VLSI» more  GLVLSI 2009»
14 years 4 months ago
Contradictory antecedent debugging in bounded model checking
In the context of formal verification Bounded Model Checking (BMC) has shown to be very powerful for large industrial designs. BMC is used to check whether a circuit satisfies a...
Daniel Große, Robert Wille, Ulrich Kühn...
MTV
2003
IEEE
154views Hardware» more  MTV 2003»
14 years 3 months ago
Tuning the VSIDS Decision Heuristic for Bounded Model Checking
Bounded Model Checking (BMC) techniques have been used for formal hardware verification, with the help of tools such as GRASP (Generic search Algorithm for Satisfiability Proble...
Ohad Shacham, Emmanuel Zarpas