This paper presents a novel technique for abstracting designs in order to increase the efficiency of formal property checking. Bounded Model Checking (BMC), using Satisfiability (...
Vivekananda M. Vedula, Whitney J. Townsend, Jacob ...
We show how to combine the two most powerful approaches for automated termination analysis of logic programs (LPs): the direct approach which operates directly on LPs and the trans...
With the proliferation of consumer computing devices with varied display and input characteristics, it has become desirable to develop interactive systems that are usable across m...
A number of representation schemes have been presented for use within Learning Classifier Systems, ranging from binary encodings to neural networks. This paper presents results fr...
We explore the effectiveness of using traces in optimization. We build a trace collection system for the Jikes Research Virtual Machine and create traces based on the execution of...