114 search results - page 15 / 23 » Address Register Assignment for Reducing Code Size |
DAC
2005
ACM
14 years 7 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
MICRO
2005
IEEE
14 years 8 days ago
2005
IEEE
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
ICIP
2009
IEEE
14 years 7 months ago
2009
IEEE
Enabling parallel processing is becoming increasingly necessary for video decoding as performance requirements continue to rise due to growing resolution and frame rate demands. I...
COLT
2008
Springer
13 years 7 months ago
2008
Springer
The problem of how a teacher and a learner can cooperate in the process of learning concepts from examples in order to minimize the required sample size without ācoding tricksā...
ISCA
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper quantiļ¬es the effect of architectural design decisions on the performance of TxLinux. TxLinux is a Linux kernel modiļ¬ed to use transactions in place of locking prim...