116 search results - page 8 / 24 » Address generation for memories containing multiple arrays |
HPCA
2003
IEEE
14 years 7 months ago
2003
IEEE
Thread-level speculation provides architectural support to aggressively run hard-to-analyze code in parallel. As speculative tasks run concurrently, they generate unsafe or specul...
JPDC
2006
13 years 7 months ago
2006
We address the problem of efficient out-of-core code generation for a special class of imperfectly nested loops encoding tensor contractions arising in quantum chemistry computati...
EUROPAR
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. This paper presents a study of performance optimization of dense matrix multiplication on IBM Cyclops-64(C64) chip architecture. Although much has been published on how t...
ICCD
1994
IEEE
13 years 11 months ago
1994
IEEE
Dynamically tagged directories are memory-efficient mechanisms for maintaining cache coherence in sharedmemory multiprocessors. These directories use specialpurpose caches of poin...
PLDI
2009
ACM
14 years 8 months ago
2009
ACM
High-level languages are growing in popularity. However, decades of C software development have produced large libraries of fast, timetested, meritorious code that are impractical...