2468 search results - page 385 / 494 » Aggregation operators 2003 |
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
In this paper we propose a design technique to pipeline cache memories for high bandwidth applications. With the scaling of technology cache access latencies are multiple clock cy...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
On-chip communication design includes designing software (SW) parts (operating system, device drivers, interrupt service routines, etc.) as well as hardware (HW) parts (on-chip co...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
Dynamically reconfigurable systems based on partial and dynamically reconfigurable FPGAs may have their functionality partially modified at run-time without stopping the operation...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
We present an innovative protocol processor component that combines wire-speed processing for low-level, and best effort processing for higher-level protocols. The component is a ...