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DATE
2003
IEEE
103views Hardware» more  DATE 2003»
14 years 2 months ago
Reduced Delay Uncertainty in High Performance Clock Distribution Networks
The design of clock distribution networks in synchronous digital systems presents enormous challenges. Controlling the clock signal delay in the presence of various noise sources,...
Dimitrios Velenis, Marios C. Papaefthymiou, Eby G....
ISCC
2003
IEEE
130views Communications» more  ISCC 2003»
14 years 2 months ago
Balanced Batch LKH: New Proposal, Implementation and Performance Evaluation
Perfect Secrecy can only be achieved in multicast groups by ciphering data sent to the group with a different key every time a member joins or leaves the group. A Key Server must ...
Josep Pegueroles, Francisco Rico-Novella
RSP
1998
IEEE
188views Control Systems» more  RSP 1998»
14 years 1 months ago
Performance and Interface Buffer Size Driven Behavioral Partitioning for Embedded Systems
One of the major differences in partitioning for codesign is in the way the communication cost is evaluated. Generally the size of the edge cut-set is used. When communication bet...
T.-C. Lin, Sadiq M. Sait, Walling R. Cyre
ICML
2010
IEEE
13 years 10 months ago
High-Performance Semi-Supervised Learning using Discriminatively Constrained Generative Models
We develop a semi-supervised learning method that constrains the posterior distribution of latent variables under a generative model to satisfy a rich set of feature expectation c...
Gregory Druck, Andrew McCallum
TPCTC
2010
Springer
147views Hardware» more  TPCTC 2010»
13 years 4 months ago
Assessing and Optimizing Microarchitectural Performance of Event Processing Systems
Abstract. Event Processing (EP) systems are being progressively used in business critical applications in domains such as algorithmic trading, supply chain management, production m...
Marcelo R. N. Mendes, Pedro Bizarro, Paulo Marques