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FPL
2004
Springer
103views Hardware» more  FPL 2004»
15 years 9 months ago
Automating Optimized Table-with-Polynomial Function Evaluation for FPGAs
Abstract. Function evaluation is at the core of many compute-intensive applications which perform well on reconfigurable platforms. Yet, in order to implement function evaluation ...
Dong-U Lee, Oskar Mencer, David J. Pearce, Wayne L...
AINA
2003
IEEE
15 years 8 months ago
Detection of Multiple Bottleneck Bandwidth
This paper endeavors to present a scheme to detect and estimate bottleneck bandwidth along the path in the Internet. We have participated in the RIPE NCC’s TTM project to perfor...
Niwat Thepvilojanapong, Yoshito Tobe, Kaoru Sezaki
122
Voted
ICNP
2003
IEEE
15 years 8 months ago
On the Cost-Quality Tradeoff in Topology-Aware Overlay Path Probing
Path probing is essential to maintaining an efficient overlay network topology. However, the cost of a full-scale probing is as high as ¢¤£¦¥¨§© , which is prohibitive i...
Chiping Tang, Philip K. McKinley
111
Voted
IEEEPACT
2003
IEEE
15 years 8 months ago
Picking Statistically Valid and Early Simulation Points
Modern architecture research relies heavily on detailed pipeline simulation. Simulating the full execution of an industry standard benchmark can take weeks to months to complete. ...
Erez Perelman, Greg Hamerly, Brad Calder
INFOCOM
2003
IEEE
15 years 8 months ago
The Impact of Correlated Link Weights on QoS Routing
Abstract— Finding a path in a network based on multiple constraints (the MCP problem) is often referred to as QoS routing. QoS routing with constraints on multiple additive metri...
Fernando A. Kuipers, Piet Van Mieghem