3456 search results - page 131 / 692 » Algorithms for Interface Synthesis |
FPGA
1995
ACM
14 years 1 months ago
1995
ACM
A novel approach is presented for transforming a given scheduled and bound signal processing algorithm for a multiplexer based datapath to a BUS/RAM based FPGA datapath. A datapat...
ARC
2008
Springer
14 years 11 days ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
DAC
2005
ACM
14 years 9 days ago
2005
ACM
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
JCP
2008
13 years 10 months ago
2008
The effect of finite wordlength on coefficients in implementing discrete-time controllers has been a subject of many recent studies. Especially, this issue is more severe in the lo...
INTEGRATION
2006
13 years 10 months ago
2006
Improving testability during the early stages of high-level synthesis has several benefits including reduced test hardware overheads, reduced test costs, reduced design iterations...