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» Aligators for Arrays (Tool Paper)
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ISVLSI
2006
IEEE
126views VLSI» more  ISVLSI 2006»
14 years 1 months ago
QUKU: A Two-Level Reconfigurable Architecture
FPGAs have been used for prototyping of ASICs, for low-volume ASIC replacement and for systems requiring in-field hardware upgrades. However, the potential to use dynamic reconfig...
Sunil Shukla, Neil W. Bergmann, Jürgen Becker
IDA
2005
Springer
14 years 1 months ago
Bayesian Networks Learning for Gene Expression Datasets
DNA arrays yield a global view of gene expression and can be used to build genetic networks models, in order to study relations between genes. Literature proposes Bayesian network ...
Giacomo Gamberoni, Evelina Lamma, Fabrizio Riguzzi...
GLVLSI
2003
IEEE
239views VLSI» more  GLVLSI 2003»
14 years 26 days ago
A novel 32-bit scalable multiplier architecture
In this paper, we present a novel hybrid multiplier architecture that has the regularity of linear array multipliers and the performance of tree multipliers and is highly scalable...
Yeshwant Kolla, Yong-Bin Kim, John Carter
FPL
1998
Springer
121views Hardware» more  FPL 1998»
13 years 11 months ago
Reconfigurable PCI-Bus Interface (RPCI)
In this paper the Peripheral Component Interface PCI is presented as a target/master reconfigurable interface, based on Programmable Logic Devices PLDs (the Field Programmable Gate...
A. Abo Shosha, P. Reinhart, F. Rongen
WSC
2007
13 years 10 months ago
Qualitative simulation of construction performance using fuzzy cognitive maps
The construction process is subject to an array of influences, both from internal and external environments, which makes the process performance uncertain and difficult to predict...
Manjula Dissanayake, Simaan M. AbouRizk