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ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
14 years 1 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
GLOBECOM
2007
IEEE
14 years 28 days ago
Scaling Laws for Delay Sensitive Traffic in Rayleigh Fading Networks
The throughput of delay sensitive traffic in a Rayleigh fading network is studied by adopting a scaling limit approach. The case of study is that of a pair of nodes establishing a ...
Nikhil Karamchandani, Massimo Franceschetti
ECRTS
2004
IEEE
14 years 23 days ago
Multiprocessor Energy-Efficient Scheduling with Task Migration Considerations
This paper targets energy-efficient scheduling of tasks over multiple processors, where tasks share a common deadline. Distinct from many research results on heuristics-based ener...
Jian-Jia Chen, Heng-Ruey Hsu, Kai-Hsiang Chuang, C...
PNPM
1987
14 years 16 days ago
Toward a Definition of Modeling Power for Stochastic Petri Net Models
Some insight on the meaning of "modeling power" for Stochastic Petri Net models is given. Extensions characterizing a Stochastic Petri Net are categorized as logical or ...
Gianfranco Ciardo
FMCAD
2008
Springer
13 years 10 months ago
Verifying an Arbiter Circuit
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...
Chao Yan, Mark R. Greenstreet