This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
The throughput of delay sensitive traffic in a Rayleigh fading network is studied by adopting a scaling limit approach. The case of study is that of a pair of nodes establishing a ...
This paper targets energy-efficient scheduling of tasks over multiple processors, where tasks share a common deadline. Distinct from many research results on heuristics-based ener...
Some insight on the meaning of "modeling power" for Stochastic Petri Net models is given. Extensions characterizing a Stochastic Petri Net are categorized as logical or ...
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...