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» Alternating Timed Automata over Bounded Time
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134
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ASPDAC
2007
ACM
158views Hardware» more  ASPDAC 2007»
15 years 7 months ago
Symbolic Model Checking of Analog/Mixed-Signal Circuits
This paper presents a Boolean based symbolic model checking algorithm for the verification of analog/mixedsignal (AMS) circuits. The systems are modeled in VHDL-AMS, a hardware des...
David Walter, Scott Little, Nicholas Seegmiller, C...
139
Voted
GLOBECOM
2007
IEEE
15 years 7 months ago
Scaling Laws for Delay Sensitive Traffic in Rayleigh Fading Networks
The throughput of delay sensitive traffic in a Rayleigh fading network is studied by adopting a scaling limit approach. The case of study is that of a pair of nodes establishing a ...
Nikhil Karamchandani, Massimo Franceschetti
140
Voted
ECRTS
2004
IEEE
15 years 7 months ago
Multiprocessor Energy-Efficient Scheduling with Task Migration Considerations
This paper targets energy-efficient scheduling of tasks over multiple processors, where tasks share a common deadline. Distinct from many research results on heuristics-based ener...
Jian-Jia Chen, Heng-Ruey Hsu, Kai-Hsiang Chuang, C...
PNPM
1987
15 years 7 months ago
Toward a Definition of Modeling Power for Stochastic Petri Net Models
Some insight on the meaning of "modeling power" for Stochastic Petri Net models is given. Extensions characterizing a Stochastic Petri Net are categorized as logical or ...
Gianfranco Ciardo
134
Voted
FMCAD
2008
Springer
15 years 5 months ago
Verifying an Arbiter Circuit
Abstract--This paper presents the verification of an asynchronous arbiter modeled at the circuit level with non-linear ordinary differential equations. We use Brockett's annul...
Chao Yan, Mark R. Greenstreet