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VALUETOOLS
2006
ACM
167views Hardware» more  VALUETOOLS 2006»
15 years 10 months ago
Detailed cache simulation for detecting bottleneck, miss reason and optimization potentialities
Cache locality optimization is an efficient way for reducing the idle time of modern processors in waiting for needed data. This kind of optimization can be achieved either on the...
Jie Tao, Wolfgang Karl
ANSS
2005
IEEE
15 years 10 months ago
J-Sim: A Simulation Environment for Wireless Sensor Networks
Wireless Sensor Networks (WSNs) have gained considerable attention in the past few years. As such, there has been an increasing need for defining and developing simulation framew...
Ahmed Sobeih, Wei-Peng Chen, Jennifer C. Hou, Lu-C...
CODES
2005
IEEE
15 years 10 months ago
Power-smart system-on-chip architecture for embedded cryptosystems
In embedded cryptosystems, sensitive information can leak via timing, power, and electromagnetic channels. We introduce a novel power-smart system-on-chip architecture that provid...
Radu Muresan, Haleh Vahedi, Y. Zhanrong, Stefano G...
CODES
2005
IEEE
15 years 10 months ago
Comparing two testbench methods for hierarchical functional verification of a bluetooth baseband adaptor
The continuous improvement on the design methodologies and processes has made possible the creation of huge and very complex digital systems. Design verification is one of the mai...
Edgar L. Romero, Marius Strum, Wang Jiang Chau
CODES
2005
IEEE
15 years 10 months ago
CRAMES: compressed RAM for embedded systems
Memory is a scarce resource in many embedded systems. Increasing memory often increases packaging and cooling costs, size, and energy consumption. This paper presents CRAMES, an e...
Lei Yang, Robert P. Dick, Haris Lekatsas, Srimat T...
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