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» Alternative Test Methods Using IEEE 1149.4
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IOLTS
2000
IEEE
105views Hardware» more  IOLTS 2000»
14 years 6 days ago
Comparison between Random and Pseudo-Random Generation for BIST of Delay, Stuck-at and Bridging Faults
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
Patrick Girard, Christian Landrault, Serge Pravoss...
DSD
2006
IEEE
93views Hardware» more  DSD 2006»
14 years 1 months ago
High-Level Decision Diagram based Fault Models for Targeting FSMs
Recently, a number of works have been published on implementing assignment decision diagram models combined with SAT methods to address register-transfer level test pattern genera...
Jaan Raik, Raimund Ubar, Taavi Viilukas
CVPR
2011
IEEE
13 years 3 months ago
Discrete-Continuous Optimization for Large-scale Structure from Motion
Recent work in structure from motion (SfM) has successfully built 3D models from large unstructured collections of images downloaded from the Internet. Most approaches use increme...
David Crandall, Andrew Owens, Noah Snavely, Daniel...
ISSRE
2006
IEEE
14 years 1 months ago
Call Stack Coverage for GUI Test-Suite Reduction
—Graphical user interfaces (GUIs) are used as front ends to most of today’s software applications. The event-driven nature of GUIs presents new challenges for testing. One impo...
Scott McMaster, Atif M. Memon
APSEC
2006
IEEE
14 years 1 months ago
Testing of Timer Function Blocks in FBD
Testing for time-related behaviors of PLC software is important and should be performed carefully. We propose a structural testing technique on Function Block Diagram(FBD) network...
Eunkyoung Jee, Seungjae Jeon, Hojung Bang, Sung De...