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ICCAD
2010
IEEE
158views Hardware» more  ICCAD 2010»
13 years 8 months ago
Novel binary linear programming for high performance clock mesh synthesis
Clock mesh is popular in high performance VLSI design because it is more robust against variations than clock tree at a cost of higher power consumption. In this paper, we propose ...
Minsik Cho, David Z. Pan, Ruchir Puri
HCW
1999
IEEE
14 years 2 months ago
Communication Modeling of Heterogeneous Networks of Workstations for Performance Characterization of Collective Operations
: Networks of Workstations (NOW) have become an attractive alternative platform for high performance computing. Due to the commodity nature of workstations and interconnects and du...
Mohammad Banikazemi, Jayanthi Sampathkumar, Sandee...
CISIS
2008
IEEE
14 years 4 months ago
Hybrid Performance Modeling and Prediction of Large-Scale Computing Systems
Abstract—Performance is a key feature of large-scale computing systems. However, the achieved performance when a certain program is executed is significantly lower than the maxi...
Sabri Pllana, Siegfried Benkner, Fatos Xhafa, Leon...
SI3D
1995
ACM
14 years 1 months ago
The Sort-First Rendering Architecture for High-Performance Graphics
Interactive graphics applications have long been challenging graphics system designers by demanding machines that can provide ever increasing polygon rendering performance. Anothe...
Carl Mueller
FPL
1995
Springer
137views Hardware» more  FPL 1995»
14 years 1 months ago
High-Speed Region Detection and Labeling Using an FPGA Based Custom Computing Platform
General purpose custom computing platforms, such as Splash-2, have demonstrated the ability to enter mainstream computing not only due to their near application-specific speeds bu...
Ramana V. Rachakonda, Peter M. Athanas, A. Lynn Ab...