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DAC
2003
ACM
14 years 8 months ago
Using estimates from behavioral synthesis tools in compiler-directed design space exploration
This paper considers the role of performance and area estimates from behavioral synthesis in design space exploration. We have developed a compilation system that automatically ma...
Byoungro So, Pedro C. Diniz, Mary W. Hall
ISCA
2009
IEEE
146views Hardware» more  ISCA 2009»
14 years 2 months ago
Multi-execution: multicore caching for data-similar executions
While microprocessor designers turn to multicore architectures to sustain performance expectations, the dramatic increase in parallelism of such architectures will put substantial...
Susmit Biswas, Diana Franklin, Alan Savage, Ryan D...
IEEEPACT
2006
IEEE
14 years 1 months ago
Architectural support for operating system-driven CMP cache management
The role of the operating system (OS) in managing shared resources such as CPU time, memory, peripherals, and even energy is well motivated and understood [23]. Unfortunately, one...
Nauman Rafique, Won-Taek Lim, Mithuna Thottethodi
MSWIM
2005
ACM
14 years 1 months ago
An analytical model of the virtual collision handler of 802.11e
A number of analytical models have been proposed to describe the priority schemes of the Enhanced Distributed Channel Access (EDCA) mechanism of the IEEE 802.11e standard. EDCA pr...
Paal E. Engelstad, Olav N. Østerbø
MSWIM
2004
ACM
14 years 1 months ago
An enhanced HCF for IEEE 802.11e wireless networks
In this paper the behavior of the upcoming MAC protocol for wireless LANs IEEE 802.11e is investigated. Based on the results, we propose an enhancement for Hybrid Coordination Fun...
Balasubramanian Appiah Venkatakrishnan, S. Selvake...
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