142 search results - page 17 / 29 » An Algorithm for Locating Logic Design Errors |
DAC
2012
ACM
12 years 4 days ago
2012
ACM
In this paper, we propose two methods used in 3D IC placement that effectively exploit the die-to-die thermal coupling in the stack. First, TSVs are spread on each die to reduce t...
HPCA
2009
IEEE
14 years 10 months ago
2009
IEEE
Several recent processor designs have proposed to enhance performance by increasing the clock frequency to the point where timing faults occur, and by adding error-correcting supp...
MOBICOM
2006
ACM
14 years 3 months ago
2006
ACM
Indoor ranging and location in WLAN is possible through obtaining Round-Trip-Time (RTT) measurements at data link level. This procedure allows using the existing IEEE 802.11 WLAN ...
UIST
2005
ACM
14 years 3 months ago
2005
ACM
A significant problem encounteredwhen building Augmented Reality (AR) systems is that all spatial knowledge about the world has uncertainty associated with it. This uncertainty m...
GIS
2006
ACM
13 years 9 months ago
2006
ACM
We present an algorithm for polyline (and polygon) similarity testing that is based on the double-cross formalism. To determine the degree of similarity between two polylines, the...