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» An Algorithm for Locating Logic Design Errors
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TCAD
2008
93views more  TCAD 2008»
13 years 7 months ago
Transforming Cyclic Circuits Into Acyclic Equivalents
Abstract--Designers and high-level synthesis tools can introduce unwanted cycles in digital circuits, and for certain combinational functions, cyclic circuits that are stable and d...
Osama Neiroukh, Stephen A. Edwards, Xiaoyu Song
CAV
2004
Springer
151views Hardware» more  CAV 2004»
13 years 11 months ago
QB or Not QB: An Efficient Execution Verification Tool for Memory Orderings
We study the problem of formally verifying shared memory multiprocessor executions against memory consistency models--an important step during post-silicon verification of multipro...
Ganesh Gopalakrishnan, Yue Yang, Hemanthkumar Siva...
IPSN
2007
Springer
14 years 1 months ago
Robust system multiangulation using subspace methods
Sensor location information is a prerequisite to the utility of most sensor networks. In this paper we present a robust and low-complexity algorithm to self-localize and orient se...
Joshua N. Ash, Lee C. Potter
VTS
2000
IEEE
89views Hardware» more  VTS 2000»
13 years 11 months ago
Fault Escapes in Duplex Systems
Hardware duplication techniques are widely used for concurrent error detection in dependable systems to ensure high availability and data integrity. These techniques are vulnerabl...
Subhasish Mitra, Nirmal R. Saxena, Edward J. McClu...
EUROGP
2009
Springer
105views Optimization» more  EUROGP 2009»
13 years 12 months ago
Quantum Circuit Synthesis with Adaptive Parameters Control
The contribution presented herein proposes an adaptive genetic algorithm applied to quantum logic circuit synthesis that, dynamically adjusts its control parameters. The adaptation...
Cristian Ruican, Mihai Udrescu, Lucian Prodan, Mir...