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» An Algorithm for Locating Logic Design Errors
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ASPDAC
2005
ACM
81views Hardware» more  ASPDAC 2005»
13 years 10 months ago
Design and design automation of rectification logic for engineering change
In a later stage of a VLSI design, it is quite often to modify a design implementation to accommodate the new specification, design errors, or to meet design constraints. In addit...
Cheng-Hung Lin, Yung-Chang Huang, Shih-Chieh Chang...
CODES
2003
IEEE
14 years 1 months ago
Design space exploration of a hardware-software co-designed GF(2m) galois field processor for forward error correction and crypt
This paper describes a hardware-software co-design approach for flexible programmable Galois Field Processing for applications which require operations over GF(2m ), such as RS an...
Wei Ming Lim, Mohammed Benaissa
FLAIRS
2004
13 years 9 months ago
Prototype Based Classifier Design with Pruning
An algorithm is proposed to prune the prototype vectors (prototype selection) used in a nearest neighbor classifier so that a compact classifier can be obtained with similar or ev...
Jiang Li, Michael T. Manry, Changhua Yu
DSD
2008
IEEE
166views Hardware» more  DSD 2008»
14 years 2 months ago
Pearson - based Analysis of Positioning Error Distribution in Wireless Sensor Networks
Abstract—In two recent contributions [1], [2], we have provided a comparative analysis of various optimization algorithms, which can be used for atomic location estimation, and s...
Stefano Tennina, Marco Di Renzo, Fabio Graziosi, F...
MOBISYS
2005
ACM
14 years 8 months ago
The Horus WLAN location determination system
We present the design and implementation of the Horus WLAN location determination system. The design of the Horus system aims at satisfying two goals: high accuracy and low comput...
Moustafa Youssef, Ashok K. Agrawala