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» An Analog Leaf Cell for Analog Circuit Design
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DAC
2005
ACM
13 years 9 months ago
Performance space modeling for hierarchical synthesis of analog integrated circuits
Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
CHINAF
2006
110views more  CHINAF 2006»
13 years 7 months ago
Time-domain analysis methodology for large-scale RLC circuits and its applications
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
Zuying Luo, Yici Cai, Sheldon X.-D. Tan, Xianlong ...
ISVLSI
2007
IEEE
205views VLSI» more  ISVLSI 2007»
14 years 1 months ago
An Automated Passive Analog Circuit Synthesis Framework using Genetic Algorithms
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of b...
Angan Das, Ranga Vemuri
ISCAS
2007
IEEE
144views Hardware» more  ISCAS 2007»
14 years 1 months ago
A Fully Programmable Analog Window Comparator
— This paper presents a novel design of analog window comparator circuit. The comparator can adaptively adjust its error threshold according to the magnitude of input signal leve...
Rui Xiao, Amit Laknaur, Haibo Wang
ISCAS
2005
IEEE
132views Hardware» more  ISCAS 2005»
14 years 27 days ago
AER EAR: a matched silicon cochlea pair with address event representation interface
In this paper we present an analog integrated circuit containing a matched pair of silicon cochleae and an address event interface. Each section of the cochlea, modeled by a secon...
André van Schaik, Shih-Chii Liu