Automated analog sizing is becoming an unavoidable solution for increasing analog design productivity. The complexity of typical analog SoC subsystems however calls for efficient ...
Georges G. E. Gielen, Trent McConaghy, Tom Eeckela...
: With soaring work frequency and decreasing feature sizes, VLSI circuits with RLC parasitic components are more like analog circuits and should be carefully analyzed in physical d...
In this work, we present a genetic algorithm based automated circuit synthesis framework for passive analog circuits. A procedure is developed for the simultaneous generation of b...
— This paper presents a novel design of analog window comparator circuit. The comparator can adaptively adjust its error threshold according to the magnitude of input signal leve...
In this paper we present an analog integrated circuit containing a matched pair of silicon cochleae and an address event interface. Each section of the cochlea, modeled by a secon...