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ICC
2007
IEEE
165views Communications» more  ICC 2007»
14 years 1 months ago
Throughput and Delay Analysis of Multihop IEEE 802.11 Networks with Capture
In this paper, we present an analytical model for the approximate calculation of the throughput and end-toend delay performance in single hop and multihop IEEE 802.11 networks unde...
Rima Khalaf, Izhak Rubin, Ju-Lan Hsu
DATE
2003
IEEE
76views Hardware» more  DATE 2003»
14 years 22 days ago
Modeling Noise Transfer Characteristic of Dynamic Logic Gates
Dynamic noise analysis is recently gaining more attention as a definitive method to overcome glaring deficiencies of static noise analysis. Exact dynamic noise analysis requires...
Li Ding 0002, Pinaki Mazumder
JAPLL
2007
78views more  JAPLL 2007»
13 years 7 months ago
Execution architectures for program algebra
We investigate the notion of an execution architecture in the setting of the program algebra PGA, and distinguish two sorts of these: analytic architectures, designed for the purp...
Jan A. Bergstra, Alban Ponse
TVLSI
2002
93views more  TVLSI 2002»
13 years 7 months ago
Simultaneous switching noise in on-chip CMOS power distribution networks
Simultaneous switching noise (SSN) has become an important issue in the design of the internal on-chip power distribution networks in current very large scale integration/ultra lar...
Kevin T. Tang, Eby G. Friedman
ICCSA
2004
Springer
14 years 24 days ago
A Reduced Codification for the Logical Representation of Job Shop Scheduling Problems
Abstract. This paper presents the Job Shop Scheduling Problem (JSSP) represented as the well known Satisfiabilty Problem (SAT). Even though the representation of JSSP in SAT is not...
Juan Frausto Solís, Marco Antonio Cruz-Chav...