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HPCA
1998
IEEE
13 years 11 months ago
Performance Study of a Concurrent Multithreaded Processor
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
Jenn-Yuan Tsai, Zhenzhen Jiang, Eric Ness, Pen-Chu...
CGO
2008
IEEE
14 years 1 months ago
Spice: speculative parallel iteration chunk execution
The recent trend in the processor industry of packing multiple processor cores in a chip has increased the importance of automatic techniques for extracting thread level paralleli...
Easwaran Raman, Neil Vachharajani, Ram Rangan, Dav...
PPOPP
2003
ACM
14 years 19 days ago
Compiler support for speculative multithreading architecture with probabilistic points-to analysis
Speculative multithreading (SpMT) architecture can exploit thread-level parallelism that cannot be identified statically. Speedup can be obtained by speculatively executing threa...
Peng-Sheng Chen, Ming-Yu Hung, Yuan-Shin Hwang, Ro...
PPSN
1994
Springer
13 years 11 months ago
RPL2: A Language and Parallel Framework for Evolutionary Computing
The Reproductive Plan Language 2 (RPL2) is an extensible interpreted language for writing and using evolutionary computing programs. It supports arbitrary genetic representations,...
Patrick D. Surry, Nicholas J. Radcliffe
MICRO
2000
IEEE
133views Hardware» more  MICRO 2000»
13 years 11 months ago
Compiler controlled value prediction using branch predictor based confidence
Value prediction breaks data dependencies in a program thereby creating instruction level parallelism that can increase program performance. Hardware based value prediction techni...
Eric Larson, Todd M. Austin