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ICLP
2001
Springer
14 years 1 months ago
PALS: An Or-Parallel Implementation of Prolog on Beowulf Architectures
This paper describes the development of the PALS system, an implementation of Prolog that efficiently exploits or-parallelism on share-nothing platforms. PALS makes use of a novel ...
Karen Villaverde, Enrico Pontelli, Hai-Feng Guo, G...
ISSS
2002
IEEE
126views Hardware» more  ISSS 2002»
14 years 2 months ago
Unifying Memory and Processor Wrapper Architecture in Multiprocessor SoC Design
In this paper, we present a new methodology for application specific multiprocessor system-on-chip design. This approach facilitates the integration of existing components with th...
Ahmed Amine Jerraya, Damien Lyonnard, Samy Meftali...
IJON
2006
165views more  IJON 2006»
13 years 9 months ago
Design and basic blocks of a neuromorphic VLSI analogue vision system
: In this paper we present a complete neuromorphic image processing system and we report the development of an integrated CMOS low-power circuit to test the feasibility of its diff...
Jordi Cosp, Jordi Madrenas, Daniel Fernánde...
PLDI
2004
ACM
14 years 2 months ago
Fast searches for effective optimization phase sequences
It has long been known that a fixed ordering of optimization phases will not produce the best code for every application. One approach for addressing this phase ordering problem ...
Prasad Kulkarni, Stephen Hines, Jason Hiser, David...
SIES
2010
IEEE
13 years 7 months ago
Distributed Coordination of Task Migration for Fault-Tolerant FlexRay Networks
In this paper we present an approach to increase the fault tolerance in FlexRay networks by introducing backup nodes to replace defect ECUs (Electronic Control Units). In order to ...
Kay Klobedanz, Gilles B. Defo, Wolfgang Mülle...