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DATE
2007
IEEE
145views Hardware» more  DATE 2007»
14 years 2 months ago
Using an innovative SoC-level FMEA methodology to design in compliance with IEC61508
This paper proposes an innovative methodology to perform and validate a Failure Mode and Effects Analysis (FMEA) at System-on-Chip (SoC) level. This is done in compliance with the...
Riccardo Mariani, Gabriele Boschi, Federico Colucc...
DOCENG
2004
ACM
14 years 1 months ago
Behavioral reactivity and real time programming in XML: functional programming meets SMIL animation
XML and its associated languages are emerging as powerful authoring tools for multimedia and hypermedia web content. Furthermore, intelligent presentation generation engines have ...
Peter R. King, Patrick Schmitz, Simon J. Thompson
IRREGULAR
1997
Springer
14 years 16 hour ago
Parallel Shared-Memory State-Space Exploration in Stochastic Modeling
Stochastic modeling forms the basis for analysis in many areas, including biological and economic systems, as well as the performance and reliability modeling of computers and comm...
Susann C. Allmaier, Graham Horton
DAGSTUHL
2001
13 years 9 months ago
Understanding Algorithms by Means of Visualized Path Testing
Visualization of an algorithm offers only a rough picture of operations. Explanations are crucial for deeper understanding, because they help the viewer to associate the visualiza...
Ari Korhonen, Erkki Sutinen, Jorma Tarhio
CORR
2007
Springer
154views Education» more  CORR 2007»
13 years 7 months ago
Application of a design space exploration tool to enhance interleaver generation
This paper presents a methodology to efficiently explore the design space of communication adapters. In most digital signal processing (DSP) applications, the overall performance ...
Cyrille Chavet, Philippe Coussy, Pascal Urard, Eri...