1029 search results - page 160 / 206 » An Architecture for Problem Solving with Diagrams |
DAC
2009
ACM
14 years 9 months ago
2009
ACM
Abstract--To reduce chip-scale topography variation in Chemical Mechanical Polishing (CMP) process, dummy fill is widely used to improve the layout density uniformity. Previous res...
DAC
2008
ACM
14 years 9 months ago
2008
ACM
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
DAC
2007
ACM
14 years 9 months ago
2007
ACM
High efficiency low voltage DC-DC conversion is a key enabler to the design of power-efficient integrated circuits. Typically a star configuration of the DC-DC converters, where o...
DAC
2005
ACM
14 years 9 months ago
2005
ACM
Power minimization under variability is formulated as a rigorous statistical robust optimization program with a guarantee of power and timing yields. Both power and timing metrics...
IMSCCS
2007
IEEE
14 years 3 months ago
2007
IEEE
Ad hoc networks face the problem of improving networks’ capacity and scalability. The scalability problem can be properly solved through physical hierarchy networking. In this p...