This paper presents a methodology for accurate propagation of delay information through a gate for the purpose of static timing analysis (STA) in the presence of noise. Convention...
Shahin Nazarian, Massoud Pedram, Emre Tuncer, Tao ...
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
Dinesh Patil, Sunghee Yun, Seung-Jean Kim, Alvin C...
Pervasive user mobility, wireless connectivity and the widespread diffusion of portable devices raise new challenges for ubiquitous service provisioning. An emerging architecture ...
Antonio Corradi, Rebecca Montanari, Daniela Tibald...
Faults in an IP network have various causes such as the failure of one or more routers at the IP layer, fiber-cuts, failure of physical elements at the optical layer, or extraneo...
Srikanth Kandula, Dina Katabi, Jean-Philippe Vasse...
Many industrial or research activities are so expensive that it is often benefitable for the involved agents to cofund the construction or the purchase of a common required resou...