50 search results - page 9 / 10 » An Automated Mapping of Timed Functional Specification to a ... |
DAC
2005
ACM
14 years 8 months ago
2005
ACM
In many of embedded systems, particularly for those with high data computations, the delay of memory access is one of the major bottlenecks in the system's performance. It ha...
EUROMICRO
1999
IEEE
13 years 11 months ago
1999
IEEE
Software synthesis for system level design languages becomes feasible because the current technology, pricing and application trends will most likely alleviate the industrial empha...
UPP
2004
Springer
14 years 20 days ago
2004
Springer
Abstract. Achieving real-time response to complex, ambiguous, highbandwidth data is impractical with conventional programming. Only the narrow class of compressible input-output ma...
DAC
2004
ACM
14 years 8 months ago
2004
ACM
We present novel and efficient methods for on-line testing in FPGAs. The testing approach uses a ROving TEster (ROTE), which has provable diagnosabilities and is also faster than ...
IDA
1998
Springer
13 years 7 months ago
1998
Springer
We investigate a form of modular neural network for classification with (a) pre-separated input vectors entering its specialist (expert) networks, (b) specialist networks which ar...