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CORR
2006
Springer
116views Education» more  CORR 2006»
13 years 7 months ago
Memory Aware High-Level Synthesis for Embedded Systems
We introduce a new approach to take into account the memory architecture and the memory mapping in the High- Level Synthesis of Real-Time embedded systems. We formalize the memory...
Gwenolé Corre, Eric Senn, Nathalie Julien, ...
CLUSTER
2009
IEEE
13 years 11 months ago
Analytical modeling and optimization for affinity based thread scheduling on multicore systems
Abstract--This paper proposes an analytical model to estimate the cost of running an affinity-based thread schedule on multicore systems. The model consists of three submodels to e...
Fengguang Song, Shirley Moore, Jack Dongarra
DAC
2011
ACM
12 years 7 months ago
Throughput maximization for periodic real-time systems under the maximal temperature constraint
We study the problem on how to maximize the throughput for a periodic real-time system under the given peak temperature constraint. We assume that different tasks in our system ma...
Huang Huang, Gang Quan, Jeffrey Fan, Meikang Qiu
ASPDAC
2008
ACM
135views Hardware» more  ASPDAC 2008»
13 years 9 months ago
Block cache for embedded systems
On chip memories provide fast and energy efficient storage for code and data in comparison to caches or external memories. We present techniques and algorithms that allow for an au...
Dominic Hillenbrand, Jörg Henkel
PPOPP
2009
ACM
14 years 8 months ago
Compiler-assisted dynamic scheduling for effective parallelization of loop nests on multicore processors
Recent advances in polyhedral compilation technology have made it feasible to automatically transform affine sequential loop nests for tiled parallel execution on multi-core proce...
Muthu Manikandan Baskaran, Nagavijayalakshmi Vydya...