55 search results - page 4 / 11 » An Efficient Hybrid Cache Coherence Protocol for Shared Memo... |
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...
HPCA
1998
IEEE
13 years 11 months ago
1998
IEEE
Run-time parallelization is often the only way to execute the code in parallel when data dependence information is incomplete at compile time. This situation is common in many imp...
IPPS
2003
IEEE
14 years 19 days ago
2003
IEEE
Our recent work on uniprocessor and single-node multiprocessor (SMP) active memory systems uses address remapping techniques in conjunction with extended cache coherence protocols...
HPCA
2000
IEEE
13 years 11 months ago
2000
IEEE
Abstract—Sharing patterns in shared-memory multiprocessors are the key to performance: uniprocessor latencytolerating techniques such as out-of-order execution and non-blocking c...
SC
1992
ACM
13 years 11 months ago
1992
ACM
We are currently developing Willow, a shared-memory multiprocessor whose design provides system capacity and performance capable of supporting over a thousand commercial microproc...